[HH] Has anyone seen a solution to this?

[Mark Komarinski]

> On Feb 15, 2016, at 5:23 PM, Kurt Keville <kurt.keville at gmail.com> wrote:
> 
> Well the first batch of nodes we are going to try this with are the Jetson TK1s...  
> http://www.nvidia.com/object/jetson-tk1-embedded-dev-kit.html <http://www.nvidia.com/object/jetson-tk1-embedded-dev-kit.html>    ... there aren't a lot of I/O options and we have already tested the onboard GigE and found it to be lacking in a couple of areas. We were thinking it would be good for intracluster commo but not a lot of sustained writes to the head node. NVidia understandably didn't put a lot of money into the NIC on board the Jetson so it isn't much to write about. There are some tantalizing GPIO pins that might represent a path to a better network although a lit search doesn't turn much up. The next gen Jetson model (the TX1) has a GPIO pinout that is compatible with Ras Pi Shield standard but I don't think that is true with the Tegra K1...  That's how I ended up investigating this path; bandwidth to local disk is pretty good on these dev kits and there aren't many (better, faster, cheaper) ways to get data off these... the best picture of the µcluster so far is at ...    http://web.mit.edu/~kkeville/www/Jetson3.jpg <http://web.mit.edu/~kkeville/www/Jetson3.jpg>
> 

First thought is to tune the GigE port.  Crank the MTU from 1500 to 9000 and it will make a huge difference in CPU usage and throughput.  There’s some other kernel tunables that you can look up to make more efficient use of the memory.

The USB 3.0 GigE port is another good idea.  Then you can either bond the interfaces together or segregate the traffic over two separate networks.

-Mark

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