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On Sat, Jul 10, 2010 at 8:08 PM, Jerry Natowitz <j.natowitz-KealBaEQdz4 at public.gmane.org> wrote: > Except that the example DF gave is of a linear change and Moore's Law is > about exponential changes. I'm not following the chip world closely > enough to know if CMOS manufacturing process size is continuing to > shrink at the same rate as it used to - 18 months between process > changes that resulted in a halving of cell size - but starting at 65nm > process, gate pitch reduced slower than general feature size, and at > 45nm many other features started showing reducing scaling. ?This would > explain why clock speeds are increasing more slowly than expected, but > transistor count continues to grow (more cores, more cache). Moore's law as originally stated is still holding quite well -- the number of transistors in a chip of a given area is indeed doubling every two years (give or take a few months). Previously those extra transistors directly correlated with extra performance, so that led several people to incorrectly assume that the law said that "performance" doubled every two years. In the microprocessor space, these days those extra transistors are being used for other purposes besides just raw performance: integration of more components and also power management. So we are now getting better performance per Watt of power consumed, but not that much improvement in raw performance. Also, it is increasingly harder to extract more single thread performance out of CPU cores, therefore the scaling to multiple cores. But I would argue that software is still catching up to the multithreaded world (for non-server applications), so we haven't yet been able to unlock the full potential of the extra cores in your desktop/laptop. Applications are also increasingly more memory or I/O bound, so most of the time the CPU just sits waiting for data. -Shankar
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