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[Discuss] Is RISC-V ready for prime time?
- Subject: [Discuss] Is RISC-V ready for prime time?
- From: richard.pieri at gmail.com (Rich Pieri)
- Date: Thu, 18 Jun 2026 09:26:19 -0400
- In-reply-to: <878q8cprns.fsf@hobgoblin.ariadne.com>
- References: <mailman.1.1781712002.32673.discuss@lists.blu.org> <878q8cprns.fsf@hobgoblin.ariadne.com>
On Wed, 17 Jun 2026 21:24:07 -0400 "Dale R. Worley" <Dale.Worley at comcast.net> wrote: > they had a monopoly on SPARC processors, or at least, in licensing the > IP therefore. Hence they had an incentive to ensure all of the > hardware interface bric-a-brac was well-defined for whatever class of > computers they were targeting. I feel the need to turn this on its head: why do you think RISC-V *isn't* well-defined? Your arguments imply that you think RISC-V is some kind of half-baked amateur CPU architecture with no academic or industrial support. -- \m/ (--) \m/
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- [Discuss] Is RISC-V ready for prime time?
- From: Dale.Worley at comcast.net (Dale R. Worley)
- [Discuss] Is RISC-V ready for prime time?
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