[Discuss] Is RISC-V ready for prime time?

[Dale.Worley at comcast.net (Dale R. Worley)]

discuss-request at lists.blu.org writes:
> From: Rich Pieri <richard.pieri at gmail.com>
>
> I feel the need to turn this on its head: why do you think RISC-V
> *isn't* well-defined? Your arguments imply that you think RISC-V is
> some kind of half-baked amateur CPU architecture with no academic or
> industrial support.

I believe that RISC-V is getting to be a reasonably mature *CPU
architecture*.  But that's not the point that I'm talking about.  My
question is whether the RISC-V ecosystem is matured to the point where
it can be conveniently used by multiple manufacturers in typical
desktop/laptop systems.  Everyone who has spoken to that point, and the
web pages I've read, have said that sort of "system I/O architecture"
hasn't been solidified for RISC-V.

Of course, that doesn't matter for embedded systems -- the builders are
going to be working with the details of the hardware interfaces anyway.
And embedded systems are the bulk of the computers shipped.  But my
question is about the whitebox PC shop around the corner, not the makers
of widgets with embedded computers.  Of course, that latter is the bulk
of industrial use of computers, but again, I'm not interested in that.

Dale